78 lines
1.5 KiB
ArmAsm
78 lines
1.5 KiB
ArmAsm
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# See riscv procedure calling convention
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# https://github.com/riscv-non-isa/riscv-elf-psabi-doc
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.global libcoro_stack_swap
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libcoro_stack_swap:
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# Store caller registers on the current stack
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# Each register requires 8 bytes, there are 25 registers to save
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addi sp, sp, -0xc8
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# s* are integer callee-saved registers
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sd s0, 0x00(sp)
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sd s1, 0x08(sp)
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sd s2, 0x10(sp)
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sd s3, 0x18(sp)
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sd s4, 0x20(sp)
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sd s5, 0x28(sp)
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sd s6, 0x30(sp)
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sd s7, 0x38(sp)
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sd s8, 0x40(sp)
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sd s9, 0x48(sp)
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sd s10, 0x50(sp)
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sd s11, 0x58(sp)
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# fs* are float callee-saved registers
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fsd fs0, 0x60(sp)
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fsd fs1, 0x68(sp)
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fsd fs2, 0x70(sp)
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fsd fs3, 0x78(sp)
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fsd fs4, 0x80(sp)
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fsd fs5, 0x88(sp)
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fsd fs6, 0x90(sp)
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fsd fs7, 0x98(sp)
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fsd fs8, 0xa0(sp)
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fsd fs9, 0xa8(sp)
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fsd fs10, 0xb0(sp)
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fsd fs11, 0xb8(sp)
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# ra=return address
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sd ra, 0xc0(sp)
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# Modify stack pointer of current coroutine (a0, first argument)
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mv t0, sp
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sd t0, 0(a0)
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# Load stack pointer from target coroutine (a1, second argument)
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ld t1, 0(a1)
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mv sp, t1
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# Restore
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ld s0, 0x00(sp)
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ld s1, 0x08(sp)
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ld s2, 0x10(sp)
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ld s3, 0x18(sp)
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ld s4, 0x20(sp)
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ld s5, 0x28(sp)
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ld s6, 0x30(sp)
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ld s7, 0x38(sp)
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ld s8, 0x40(sp)
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ld s9, 0x48(sp)
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ld s10, 0x50(sp)
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ld s11, 0x58(sp)
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fld fs0, 0x60(sp)
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fld fs1, 0x68(sp)
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fld fs2, 0x70(sp)
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fld fs3, 0x78(sp)
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fld fs4, 0x80(sp)
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fld fs5, 0x88(sp)
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fld fs6, 0x90(sp)
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fld fs7, 0x98(sp)
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fld fs8, 0xa0(sp)
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fld fs9, 0xa8(sp)
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fld fs10, 0xb0(sp)
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fld fs11, 0xb8(sp)
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ld ra, 0xc0(sp)
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# Pop stack frame
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addi sp, sp, 0xc8
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# jump to ra
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ret
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